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This is the home of the Small Embedded D Assembler Register Machine (SIDEARM) space.


SIDEARM is a minimal, virtual register machine that acts as an interpreter/shell for valid AVR assembly language, opcode-based instruction set, compiler, assembler, and interpreter written mostly in the D Programming Language. The purpose of SIDEARM is to provide an educational package that makes learning how CPUs and programs work at their lowest level. and at the same time providing a real-time interface onto a running AVR microcontroller accepting AVR ASM and executing the code, as if from a shell. While the software CPU sticks to and supports the majority of AVR tiny/mega/xmega opcodes, the instruction set is a minimal but working set and should provide the basic concepts of machine architecture that is enjoyed by larger, more complex machines with a richer instruction set (like maybe an ARM Cortex M3, etc).

This project consists of an assembler to assemble your SIDEARM code and a machine emulator or interpreter to run your produced executables. The code is lavishly commented to allow interested students or persons to jump right into the code and gain an understanding of how the system works and is put together.

The complete, current, and official documentation and issue/feature tracking system is hosted elsewhere (the links are below).

SIDEARM JIRA Issue Management

If you want to lurk and follow this project go right ahead. If you want to contribute or participate in the project send me an email. I'd love to have you on the team.

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Last edited Dec 1, 2012 at 6:41 PM by DroidEngineer, version 6